specifications of any and all sanyo semiconductor co.,l td. products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer ' s products or equipment. to verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer ' sproductsor equipment. any and all sanyo semiconductor co.,ltd. products described or contained herein are, with regard to "standard application", intended for the use as general el ectronics equipment (home appliances, av equipment, communication device, office equipment, industrial equ ipment etc.). the products mentioned herein shall not be intended for use for any "special application" (medica l equipment whose purpose is to sustain life, aerospace instrument, nuclear control device, burning appliances, t ransportation machine, traffic signal system, safety equipment etc.) that shall require extremely high level of re liability and can directly threaten human lives in case of failure or malfunction of the product or may cause har m to human bodies, nor shall they grant any guarantee thereof. if you should intend to use our products for app lications outside the standard applications of our customer who is considering such use and/or outside the scope of our intended standard applications, please consult with us prior to the intended use. if there is n o consultation or inquiry before the intended use, our customer shall be solely responsible for the use. 61307 ti pc b8-6484, 6703 no.7600-1/9 LV5105FN overview the LV5105FN is a power supply for a cell phone system that integrates four series regu lators, led driver (with 5v output) on a single chip. functions ? reg 4 (cmos output) ? det circuit (one for reg1, one for vbat (with reset output) ? thermal shutdown circuit (150 c) ? three-color led driver (charge pump 5v output incorporated) ? front led driver ? mic bias output features ? low power consumption 4 a when reg4 and vbatdet operate 30 a when reg1, reg2, reg3, and reg4 + det1 and vbatdet operate ? built-in charge pump circuit vbat : 3.2v to 4. 5v, 5v constant output with a load of 80ma ? built-in 3-color led drive circuit three inde pendent colors, 128-step pwm intensity control specifications maximum ratings at ta = 25 c parameter symbol conditions ratings unit maximum supply voltage v cc max 7 v allowable power dissipation pd max ta 75 c *mounted on a board. 440 mw operating temperature topr -30 to +75 c storage temperature tstg -40 to +125 c ? mounted on a 50.0mm 50.0mm 0.8mm, glass epoxy board. bi-cmos ic for cell phone system power supply orderin g numbe r : en7600a
LV5105FN no.7600-2/9 operating conditions at ta = 25 c parameter symbol conditions ratings unit supply voltage 1 vbat 29, 33pin 3.2 to 4.5 v supply voltage 2 vbatcp 3pin 3.2 to 5.9 v electrical characteristics : analog at ta = 25 c, vbat = 3.6v, vcharge = 0v, unless otherwise specified. [current dissipation] ratings parameter symbol conditions min typ max unit current dissipation 1 i cc 1 reg4, vbatdet : on reg1, 2, 3, charge punp, det1 : off no-load vbat = 3.2v to 4.2v 4 10 a current dissipation 2 i cc 2 reg1, 2, 4, det1, vbatdet : on reg3, charge pump : off no load 25 35 a current dissipation 3 i cc 3 reg3, 4, vbatdet : on reg1, 2, det1, charge pump : off no load 20 28 a current dissipation 4 i cc 4 reg1, 2, 3, 4, det1, vbatdet : on charge pump : off no load 30 42 a current dissipation 5 i cc 5 reg1, 2, 3, 4, det1, vbatdet : on charge pump : off no load eco : l 15 21 a current dissipation 6 i cc 6 reg1, 2, 3, 4, charge pump, det1, vbatdet : on no load 5 8 ma [reg1] ratings parameter symbol conditions min typ max unit output voltage 1 v o 1 i o = 30ma, eco = h 2.74 2.8 2.86 v output voltage 2 v o 1e i o = 30ma, eco = l 2.71 2.8 2.89 v output voltage 3 v o 1 (i o = 30ma, reg1 output voltage at eco = h) - (i o = 10ma, reg1 output voltage at i o = 10 ma and eco = l) 0 15 35 mv drop out voltage vdr1 vbat = 2.7v, i o = 30ma 0.04 0.06 v load regulation v olo 1 i o = 1 to 150ma 10 50 mv line regulation v oln 1 vbat = 3.3 to 4.5v, i o = 1ma 10 60 mv output voltage temperature coefficient v o 1/ tj ta = -25 to 75 c, i o = 30ma 100 ppm/ c ripple rejection v r 1 vbat = 3.6v, i o = 30ma, vrr = -20dbv, f rr = 1khz 65 db output noise voltage v on 1 i o = 30ma, 20hz < f < 20khz 75 vrms output voltage 4 v o 2 i o = 30ma, (output voltage with charge pump on - output voltage with charge pump off) -35 35 mv [reg2] ratings parameter symbol conditions min typ max unit output voltage 1 v o 2 i o = 30ma, eco = h 2.55 2.6 2.65 v output voltage 2 v o 2e i o = 30ma, eco = l 2.53 2.6 2.67 v drop out voltage vdr1 vbat = 2.5v, i o = 30ma 0.06 0.12 v load regulation v olo 2 i o = 1 to 100ma 10 100 mv line regulation v oln 2 vbat = 3.3 to 4.5v, i o = 1ma 10 60 mv output voltage temperature coefficient v o 2/ tj ta = -25 to 75 c, i o = 30ma 100 ppm/ c ripple rejection v r 2 vbat = 3.6v, i o = 30ma, vrr = -20dbv, f rr = 1khz 65 db output noise voltage v on 2 i o = 30ma, 20hz < f < 20khz 75 vrms continued on next page.
LV5105FN no.7600-3/9 continued from preceding page. [reg3] ratings parameter symbol conditions min typ max unit output voltage 1 v o 3 i o = 30ma, eco = h 2.79 2.85 2.91 v output voltage 2 v o 3e i o = 30ma, eco = l 2.76 2.85 2.94 v drop out voltage vdr3 vbat = 2.7v, i o = 30ma 0.06 0.12 v load regulation v olo 3 i o = 1 to 50ma 10 50 mv line regulation v oln 3 vbat = 3.3 to 4.5v, i o = 1ma 10 60 mv output voltage temperature coefficient v o 3/ tj ta = -25 to 75 c, i o = 30ma 100 ppm/ c ripple rejection v r 3 vbat = 3.6v, i o = 30ma, vrr = -20dbv, f rr = 1khz 65 db output noise voltage v on 3 i o = 30ma, 20hz < f < 20khz 75 vrms [reg4] ratings parameter symbol conditions min typ max unit output voltage v o 4 i o = 30ma 2.91 3 3.09 v drop out voltage vdr3 vbat = 2.9v, i o = 30ma 0.06 0.12 v load regulation v olo 4 i o = 1 to 50ma 10 50 mv line regulation v oln 4 vbat = 3.3 to 4.5v, i o = 1ma 10 60 mv output voltage temperature coefficient v o 4/ tj ta = -25 to 75 c, i o = 30ma 100 ppm/ c ripple rejection v r 4 vbat = 3.6v, i o = 30ma, vrr = -20dbv, f rr = 1khz 55 db output noise voltage v on 4 i o = 30ma, 20hz < f < 20khz 75 vrms [det1] ratings parameter symbol conditions min typ max unit detection voltage vd1 h l 2.45 2.5 2.55 v hysteresis width v h 1 75 125 175 mv detection voltage temperature coefficient vd1/ tj ta = -25 to 75 c 100 ppm/ c [vbatdet] ratings parameter symbol conditions min typ max unit detection voltage vdb h l 3.04 3.1 3.16 v hysteresis width vhb 93 155 217 mv output pull-up resistance rpdetb 1.4 1.8 2.2 m detection voltage temperature coefficient vdb/ tj ta = -25 to 75 c 100 ppm/ c [charge pump] ratings parameter symbol conditions min typ max unit output voltage 1 vcpo1 vbat = 3.2 to 5.9v, load current 80ma 4.8 5 5.2 v oscillation frequency cposc 0.7 1 1.3 mhz output ripple vrcp vbat = 3.6, load current 80ma 200 mvp-p efficiency vbat = 3.2, load current 80ma 72 % continued on next page.
LV5105FN no.7600-4/9 continued from preceding page. [led driver] ratings parameter symbol conditions min typ max unit ledr output voltage vlr i o = 40ma 0 0.1 0.2 v ledg output voltage vlg i o = 40ma 0 0.1 0.2 v ledb output voltage vlb i o = 40ma 0 0.1 0.2 v ledf output voltage vlf i o = 40ma 0 0.15 0.3 v ledr off leak ilr 0 1 a ledg off leak ilg 0 1 a ledb off leak ilb 0 1 a ledf off leak ilf 0 1 a [mic bias] ratings parameter symbol conditions min typ max unit output on resistance rmo i o = 10ma 10 off leakage current ilm 0 1 a [output voltage (gp_0, 1)] ratings parameter symbol conditions min typ max unit output h level v oh i o = 1ma reg10 -0.3 reg10 v output l level v ol i o = 1ma 0 0.3 v [input voltage 1 (sdata, sen, sclk)] ratings parameter symbol conditions min typ max unit h level v inh 1 input h level reg10 0.8 reg10 v l level v inl 1 input l level 0 reg10 0.2 v [input voltage 2 ( t_cnt, tcxocnt, eco, reg3ctl, reg12ctl, pwro n, rtcint, msselo, msseloc, keysense4, hwreset )] ratings parameter symbol conditions min typ max unit h level v inh 2 input h level reg40 0.8 reg40 v l level v inl 2 input l level 0 reg40 0.2 v [input voltage 3 (resout_n)] ratings parameter symbol conditions min typ max unit h level v inh 3 input h level reg20 0.8 reg20 v l level v inl 3 input l level 0 reg20 0.2 v [input voltage 4 (chg_g)] ratings parameter symbol conditions min typ max unit h level v inh 4 input h level reg40 0.8 6 v l level v inl 4 input l level 0 reg40 0.2 v continued on next page.
LV5105FN no.7600-5/9 continued from preceding page. [input voltage 5 (vcharge)] ratings parameter symbol conditions min typ max unit h level v inh 5 input h level 4.4 6 v l level v inl 5 input l level 0 3.6 v [input voltage 6 (vbatbk)] ratings parameter symbol conditions min typ max unit h level v inh 6 input h level reg40 0.8 vbat v l level v inl 6 input l level 0 reg40 0.2 v electrical characteristics : serial bus [serial transfer timing] ratings parameter symbol conditions min typ max unit cycle time tcy1 sclk clock cycle 300 ns data setup time 1 ts0 sden setup time for rise of sclk 150 - - ns data setup time 2 ts1 sdata setup time for rise of sclk 150 - - ns data hold time 1 th0 sden hold time for fall of sclk 150 - - ns data hold time 2 th1 sdata hold time for rise of sclk 150 - - ns pulse width 1 tw1l sclk l-period pulse width 150 - - ns pulse width 2 tw1h sclk h-period pulse width 150 - - ns pulse width 3 tw2l sden l-period pulse width 1 - - s serial transfer timing conditions data length : 24bit clock frequency : 3mhz or les "sdata" is taken in at fall of "sde n" when "sclk" of 24 clock is entered during h period of "sden." (note) "sdata" is not taken in when "sclk" is 23 clock or less during h period of "sden." when "sclock" exceeds 25 clock, "sdata" is taken in at the 24th clock, and subsequent "sdata" is ignored. 50% sden ts0 sclk 50% th1 ts1 tw1l tw1h tcy1 d3 d2 d1 d0 d15 d13 d14 sdata tw2l a 2 a 1 a 0 a 3 a 4 a 5 a 6 a 7 a 7 a ddress data th0
LV5105FN no.7600-6/9 package dimensions unit : mm (typ) 3272 block diagram top view fled gndled sdate vcharge hwreset resout_n keysense4 msseloc msselo test2 gndr bg rref rtcint pwron reg12ctl micbias reg2o vbat23 reg3o reg3ctl reg4o vbat14 reg1o reg1os det1 eco resetl cd tcxocnt p_cnt t_cnt tt vbatbk chg_g gp _ 1 gp_0 sclk sen gndcp c- vbatcp c+ cpout test rled gled bled pwm_r 0.22 f 3.0v 50m a 4.7 f 2.8v 150m a 4.7 f 0.1 f reg12ctl reg3ctl xx vbat reg12ctl charge pump 1m 37 48 47 46 45 44 43 42 41 40 39 38 10 812 2 3 4 5 11 67 9 1 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 sanyo : vqfn48(7x7) side view bottom view 0.4 7.2 top view 5.0 5.0 7.0 7.2 7.0 0.4 0.3 0.3 0 . 2 0.5 (0.75) 0.85max (0.8) 0.2 1 12 13 24 25 36 37 48 4 - do not connect
LV5105FN no.7600-7/9 pin table esd element no. pin symbol pin description input form vbat gnd 1 gndcp charge pump circuit ground pin - - - 2 c - flying capacitor connection pin a - 3 vbatcp charge pum circuit power pin - - 4 c + flying capacitor connection pin b - 5 cpout charge pump output pin c - 6 rled rled drive pin d - 7 gled gled drive pin d - 8 gndled led drive circuit ground pin - - - 9 bled rled drive pin d - 10 fled fled drive pin d - 11 test test input pin (be sure to c onnect it to gnd during normal use) - 12 sdata serial data signal input pin e 13 sen serial enable signal input pin e 14 sclk serial clock signal input pin e 15 gp_0 serially controllable output pin f 16 gp_1 serially controllable output pin f 17 chg_g power control logic circuit input pin g - 18 vbatbk power control logic circuit input pin h 19 tt power control logic circuit output pin i 20 t_cnt power control logic circuit output pin j 21 p_cnt power control logic circuit output pin i 22 tcxocnt power control logic circuit input pin h 23 cd vbatdet delay capacitor connection pin l 24 reset reset output pin m 25 eco eco mode control pin l : eco mode, h : normal mode g 26 det1 det1 delay capacitor connection pin n 27 reg1os reg1 sense pin o 28 reg1o reg1 output pin p 29 vbat14 reg1, 4 circuit power pin - 30 reg4o reg4 output pin q 31 reg3ctl reg3 control pin l : off, h : on g 32 reg3o reg3 output pin q 33 vbat23 reg2, 3 circuit power pin - 34 reg2o reg2 output pin q 35 micbias mic bias output pin (serial control) r 36 reg12ctl reg1, 2 control pin l : off, h : on g 37 pwron power control logic circuit input pin h 38 rtcint power control logic circuit input pin s 39 rref regulator reference pin t 40 bg bgr output pin u 41 gndr regulator circuit ground pin - - - 42 test2 test input pin (be sure to c onnect it to gnd during normal use) - - - 43 msselo power control logic circuit input pin v 44 msseloc power control logic circuit input pin w 45 keysence4 power control logic circuit input pin s 46 resout_n power control logic circuit input pin x 47 hwreset power control logic circuit input pin k 48 vcharg vcharge voltage input pin y -
LV5105FN no.7600-8/9 pin table a b c d e f g h i j k l m n o p q r s t u v w x y 2k 10k 100k 120k reg4o 500k 500k schmidt inv input reg1o 2k reg1o reg4o 2k schmidt inv input reg4o 2k 1m schmidt inv input reg4o reg4o 2m schmidt inv input reg4o 2k 100k schmidt inv input vbat 1.5m schmidt inv input reg2o schmidt inv inpu t reg1o reg1o 1m vbat vbat reg2o reg4o 10k 2k schmidt inv input vbat reg4o 2k 1m 44pin schmidt inv input reg4o 2k 1m 43pin schmidt inv inpu t reg2o 10k 2k schmidt inv input
LV5105FN ps no.7600-9/9 sanyo semiconductor co.,ltd. assumes no responsib ility for equipment failures that result from using products at values that exceed, even momentarily, rate d values (such as maximum ra tings, operating condition ranges, or other parameters) listed in products specif ications of any and all sanyo semiconductor co.,ltd. products described or contained herein. sanyo semiconductor co.,ltd. strives to supply high-qual ity high-reliability products, however, any and all semiconductor products fail or malfunction with some probabi lity. it is possible that these probabilistic failures or malfunction could give rise to acci dents or events that could endanger human lives, trouble that could give rise to smoke or fire, or accidents that could cause dam age to other property. when designing equipment, adopt safety measures so that these kinds of accidents or e vents cannot occur. such measures include but are not limited to protective circuits and error prevention c ircuits for safe design, redundant design, and structural design. upon using the technical information or products descri bed herein, neither warranty nor license shall be granted with regard to intellectual property rights or any other rights of sanyo semiconductor co.,ltd. or any third party. sanyo semiconductor co.,ltd. shall not be liable f or any claim or suits with regard to a third party's intellctual property rights which has resulted from the use of the technical information and products mentioned above. information (including circuit diagr ams and circuit parameters) herein is for example only; it is not guaranteed for volume production. any and all information described or contained herein are subject to change without notice due to product/technology improvement, etc. when designing equi pment, refer to the "delivery specification" for the sanyo semiconductor co.,ltd. product that you intend to use. in the event that any or all sanyo semiconductor c o.,ltd. products described or contained herein are controlled under any of applicable local export control laws and regulations, such products may require the export license from the authorities conc erned in accordance with the above law. no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, or any in formation storage or retrieval system, or otherwise, without the prior written consent of sanyo semiconductor co.,ltd. power control block diagram this catalog provides information as of june, 2007. specifications and information herein are subject to change without notice. msselo rtcint keysense4 resout_n hwreset vcharge reg4o pwron p_cnt tt tcxocnt 1000k vbatbk chg(g) t_cnt msseloc 1000k reg4o reg4o reg4o reg4o reg4o reg4o reg4o reg2o reg4o reg4o reg4o reg4o reg4o reg4o reg4o 1000k 2000k 100k 10k 10k 10k 1000k 100k 120k reg2o reg4o reg4o vbat 10k 2k
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